The present invention relates generally to semiconductor-on-insulator (SOI) devices and methods of forming the same and, more particularly, to SOI devices and methods for forming which avoid or reduce floating body effects and reduce junction capacitance.
Traditional semiconductor-on-insulator (SOI) integrated circuits typically have a silicon substrate having a buried oxide (BOX) layer disposed thereon. A semiconductor active layer, typically made from silicon, is disposed on the BOX layer. Within the active layer, active devices, such as transistors, are formed in active regions. The size and placement of the active regions are defined by isolation regions. As a result of this arrangement, the active devices are isolated from the substrate by the BOX layer. More specifically, a body region of each SOI transistor does not have body contacts and is therefore xe2x80x9cfloating.xe2x80x9d
SOI chips offer potential advantages over bulk chips for the fabrication of high performance integrated circuits for digital circuitry. Such digital circuitry is typically made from partially-depleted metal oxide semiconductor field effect transistors (MOSFETs). In such circuits, dielectric isolation and reduction of parasitic capacitance improve circuit performance, and virtually eliminate latch-up in CMOS circuits. In addition, circuit layout in SOI can be greatly simplified and the packing density greatly increased.
However, devices formed from SOI materials typically exhibit parasitic effects due to the presence of the floating body (i.e., xe2x80x9cfloating body effectsxe2x80x9d). These floating body effects may result in undesirable performance in SOI devices. Therefore, it will be appreciated that a need exists for SOI devices having reduced floating body effects. In addition, reducing junction capacitance in SOI devices is also desirable to, in part, increase the switching speed of the device.
According to one aspect of the invention, the invention is a semiconductor-on-insulator (SOI) device. The SOI device includes a semiconductor substrate layer; an insulator layer disposed on the substrate layer; a semiconductor active region disposed on the insulator layer, the active region including a source, a drain, and a body disposed therebetween, the source and body forming an abrupt or hyperabrupt source/body junction; a gate disposed on the body such that the gate, source, drain and body are operatively arranged to form a transistor; and an implanted region forming an interface between the body and the drain, the implanted region formed by tilted atom implantation in a direction towards the active region and under the gate from an angle tilted towards the drain with respect to vertical, the implanted region resulting in the formation of a graded drain/body junction.
According to another aspect of the invention, the invention is a method of forming a semiconductor-on-insulator (SOI) device. The method includes the steps of providing an SOI wafer having a semiconductor active layer, a semiconductor substrate and a buried insulator layer disposed therebetween; defining an active region in the active layer; forming a source, a drain and a body in the active region, the source and the body forming an abrupt or hyperabrupt source/body junction; forming a gate disposed on the body such that the source, drain, body and gate are operatively arranged to form a transistor; and implanting atoms in a direction towards the active region below the gate at an angle from vertical tilted towards the drain side of the gate, the implanted atoms forming an implanted region resulting in the formation of a graded drain/body junction.